دانلود کتاب Advanced Phase-Lock Techniques

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Contents
Preface
CHAPTER 1 Phase-Locked Systems—A High-Level Perspective
1.1 PHASE-LOCKED LOOP BASICS
1.2 CONTINUOUS-TIME CONTROL SYSTEM PERSPECTIVE FOR PLLS (HIGH SNR)
1.3 TIME-SAMPLED PLL SYSTEMS (HIGH SNR)
1.4 ESTIMATION THEORETIC PERSPECTIVE (LOW SNR) FOR PLLS
1.5 SUMMARY
References
CHAPTER 2 Design Notes
2.1 SUMMARY OF CLASSIC CONTINUOUS-TIME TYPE-2 SECOND-ORDER PLL DESIGN EQUATIONS
2.2 CONTINUOUS-TIME TYPE-2 FOURTH-ORDER PLLS
2.3 DISCRETIZED PLLS
2.4 HYBRID PLLS INCORPORATING SAMPLE-AND-HOLDS
2.5 COMMUNICATION THEORY
2.6 SPECTRAL RELATIONSHIPS
2.7 TRIGONOMETRY
2.8 LAPLACE TRANSFORMS
2.9 Z-TRANSFORMS
2.10 PROBABILITY AND STOCHASTIC PROCESSES
2.11 NUMERICAL SIMULATION
2.12 CALCULUS
2.13 BUTTERWORTH LOWPASS FILTERS
2.14 CHEBYSHEV LOWPASS FILTERS
2.15 CONSTANTS
References
CHAPTER 3 Fundamental Limits
3.1 PHASE MODULATION AND BESSEL FUNCTIONS
3.2 HILBERT TRANSFORMS
3.3 CAUCHY-SCHWARZ INEQUALITY
3.4 RF FILTERING EFFECTS ON FREQUENCY STABILITY
3.5 CHEBYSHEV INEQUALITY
3.6 CHERNOFF BOUND
3.7 CRAMER-RAO BOUND
3.8 EIGENFILTERS (OPTIMAL FILTERS)
3.9 FANO BROADBAND MATCHING THEOREM
3.10 LEESON–SCHERER PHASE NOISE MODEL
3.11 THERMAL NOISE LIMITS
3.12 NYQUIST SAMPLING THEOREM
3.13 PALEY-WIENER CRITERION
3.14 PARSEVAL’S THEOREM
3.15 POISSON SUM
3.16 TIME-BANDWIDTH PRODUCT
3.17 MATCHED-FILTERS FOR DETERMINISTIC SIGNALS IN ADDITIVE WHITE GAUSSIAN NOISE (AWGN)
3.18 WEAK LAW OF LARGE NUMBERS
References
Appendix 3A: Maximum-Likelihood Frequency Estimator
Appendix 3B: Phase Probability Density Function for Sine Wave in AWGN
CHAPTER 4 Noise in PLL-Based Systems
4.1 INTRODUCTION
4.2 SOURCES OF NOISE
4.3 POWER SPECTRAL DENSITY CONCEPT FOR CONTINUOUS-TIME STOCHASTIC SIGNALS
4.4 POWER SPECTRAL DENSITY FOR DISCRETE-TIME SAMPLED SYSTEMS
4.5 PHASE NOISE FIRST PRINCIPLES
4.6 RANDOM PHASE NOISE
4.7 NOISE IMPRESSION ON TIME AND FREQUENCY SOURCES
References
Appendix 4A: Review of Stochastic Random Processes
Appendix 4B: Accurate Noise Modeling for Computer Simulations
Appendix 4C: Creating Arbitrary Noise Spectra in a Digital Signal Processing Environment
Appendix 4D: Noise in Direct Digital Synthesizers
CHAPTER 5 System Performance
5.1 SYSTEM PERFORMANCE OVERVIEW
5.2 INTEGRATED PHASE NOISE
5.3 LOCAL OSCILLATORS FOR RECEIVE SYSTEMS
5.4 LOCAL OSCILLATORS FOR TRANSMIT SYSTEMS
5.5 LOCAL OSCILLATOR PHASE NOISE IMPACT ON DIGITAL COMMUNICATION ERROR RATE PERFORMANCE
5.6 PHASE NOISE EFFECTS ON OFDM SYSTEMS
5.7 PHASE NOISE EFFECTS ON SPREAD-SPECTRUM SYSTEMS
5.8 PHASE NOISE IMPACT FOR MORE ADVANCED MODULATION WAVEFORMS
5.9 CLOCK NOISE IMPACT ON DAC PERFORMANCE
5.10 CLOCK NOISE IMPACT ON ADC PERFORMANCE
References
Appendix 5A: Image Suppression and Error Vector Magnitude
Appendix 5B: Channel Capacity and Cutoff Rate
CHAPTER 6 Fundamental Concepts for Continuous-Time Systems
6.1 CONTINUOUS VERSUS DISCRETE TIME
6.2 BASIC CONTINUOUS-TIME PHASE-LOCKED LOOPS
6.3 ADDITIONAL RESULTS FOR THE IDEAL TYPE-2 PLL
6.4 LOOP FILTERS
6.5 MORE COMPLICATED LOOP FILTERS
6.6 TYPE-3 PLL
6.7 HAGGAI CONSTANT PHASE MARGIN LOOP (9 DB PER OCTAVE)
6.8 PSEUDO-CONTINUOUS PHASE DETECTOR MODELS
6.9 STABILITY ANALYSIS
6.10 TRANSIENT RESPONSE EVALUATION FOR CONTINUOUS-TIME SYSTEMS
References
Appendix 6A: Simplification of Linear Systems
Appendix 6B: Bandwidth Considerations for Continuous-Time Modeling of Time-Sampled Systems
Appendix 6C: Christiaan Huygens and Phase-Locked Pendulum Clocks
Appendix 6D: Admittance Matrix Methods for Analyzing Complex Loop Filters
CHAPTER 7 Fundamental Concepts for Sampled-Data Control Systems
7.1 SAMPLED SIGNAL BASICS
7.2 RELATIONSHIPS BETWEEN CONTINUOUS-TIME AND DISCRETE-TIME SIGNAL REPRESENTATIONS
7.3 SAMPLED-TIME PLL
7.4 STABILITY ASSESSMENT FOR SAMPLED SYSTEMS
7.5 TIME-DOMAIN RESPONSE
7.6 CLOSED-FORM RESULTS FOR SAMPLED PLLS
7.7 PSEUDO-CONTINUOUS VERSUS SAMPLED SYSTEM ANALYSIS
7.8 NOISE IN SAMPLED SYSTEMS
References
Appendix 7A: Additional Closed-Form Results for Sampled PLLs
CHAPTER 8 Fractional-N Frequency Synthesizers
8.1 A BRIEF HISTORY OF FRACTIONAL-N SYNTHESIS
8.2 ANALOG-BASED FRACTIONAL-N SYNTHESIS
8.3 -Σ MODULATOR FUNDAMENTALS
8.4 -Σ FREQUENCY SYNTHESIS ARCHITECTURES
8.5 SINGLE-BIT VERSUS MULTIPLE-BIT OUTPUT -Σ MODULATORS
8.6 COMBATING DISCRETE SPURIOUS TONES
8.7 -Σ FRACTIONAL-N CAVEATS TO AVOID
8.8 FINAL RECOMMENDATIONS
References
CHAPTER 9 Oscillators
9.1 LINEAR OSCILLATOR THEORY
9.2 OSCILLATOR CONFIGURATIONS
9.3 OSCILLATOR USAGE IN PHASE-LOCKED LOOPS
9.4 OSCILLATOR IMPAIRMENTS
9.5 CLASSICAL PHASE NOISE MODELS
9.6 NONLINEAR OSCILLATORS AND NOISE
References
CHAPTER 10 Clock and Data Recovery
10.1 CLOCK AND DATA RECOVERY BASICS
10.2 SIGNALING WAVEFORMS
10.3 INTERSYMBOL INTERFERENCE
10.4 BIT ERROR RATE
10.5 OPTIMAL TIMING RECOVERY METHODS
10.6 BIT ERROR RATE INCLUDING TIME RECOVERY
10.7 FINAL THOUGHTS
References
Appendix 10A: BER Calculation Using the Gil-Pelaez Theorem
Acronyms and Abbreviations
List of Symbols
About the Author
Index