توضیحاتی در مورد کتاب Functional Safety for Embedded Systems
نام کتاب : Functional Safety for Embedded Systems
عنوان ترجمه شده به فارسی : ایمنی عملکردی برای سیستم های جاسازی شده
سری :
نویسندگان : Guoqi Xie, Yawen Zhang, Renfa Li, Kenli Li, Keqin Li
ناشر : CRC Press
سال نشر : 2023
تعداد صفحات : 182
ISBN (شابک) : 1032489367 , 9781032489360
زبان کتاب : English
فرمت کتاب : pdf
حجم کتاب : 13 مگابایت
بعد از تکمیل فرایند پرداخت لینک دانلود کتاب ارائه خواهد شد. درصورت ثبت نام و ورود به حساب کاربری خود قادر خواهید بود لیست کتاب های خریداری شده را مشاهده فرمایید.
فهرست مطالب :
Cover
Half Title
Title Page
Copyright Page
Contents
Foreword
Preface
Contributors
CHAPTER 1: Introduction
1.1. AUTOMOTIVE EMBEDDED SYSTEMS
1.2. FUNCTIONAL SAFETY
1.2.1. Functional Safety Standard
1.2.2. Automotive Safety Integrity Level (ASIL) Determination
1.3. CHALLENGES OF FUNCTIONAL SAFETY DESIGN
1.4. STRUCTURE OF THE RESEARCH
1.5. FUNCTIONAL SAFETY ASSURANCE
1.5.1. Functional Safety Verification
1.5.2. Functional Safety Enhancement
1.5.3. Functional Safety Validation
1.6. SAFETY-AWARE COST OPTIMIZATION
1.6.1. Hardware Cost Optimization
1.6.2. Development Cost Optimization
1.7. OUTLINE OF THE BOOK
1.8. CONCLUDING REMARKS
SECTION I: FUNCTIONAL SAFETY ASSURANCE
CHAPTER 2: Functional Safety Verification
2.1. INTRODUCTION
2.2. RELATED WORK
2.3. MODELS AND PRELIMINARIES
2.3.1. System Model
2.3.2. Reliability Model
2.3.3. Reliability Requirement Assessment
2.3.4. Real-Time Requirement Assessment
2.3.5. Problem Statement
2.4. RESPONSE TIME MINIMIZATION UNDER RELIABILITY REQUIREMENT
2.4.1. Satisfying Reliability Requirement
2.4.2. Response Time Minimization
2.4.3. Example of the FFSV1
2.5. RELIABILITY MAXIMIZATION UNDER REAL-TIME REQUIREMENT
2.5.1. Satisfying Real-Time Requirement
2.5.2. Reliability Maximization
2.5.3. Example of the FFSV2
2.5.4. Union Verification
2.6. EXPERIMENTS FOR FUNCTIONAL SAFETY VERIFICATION ALGORITHMS FFSV2, FFSV2, AND UFFSV
2.6.1. Real-Life Parallel Application
2.6.2. Synthetic Parallel Application
2.7. CONCLUDING REMARKS
CHAPTER 3: Functional Safety Enhancement
3.1. INTRODUCTION
3.2. RELATED WORK
3.3. MODELS AND PROBLEM STATEMENT
3.3.1. Lower Bound of Application
3.3.2. Problem Statement
3.4. BACKWARD AND FORWARD SAFETY ENHANCEMENT
3.4.1. Existing BFSE Algorithm
3.4.2. FFSE Algorithm
3.5. REPEATED SAFETY ENHANCEMENT
3.5.1. RBFSE Algorithm
3.5.2. RFFSE Algorithm
3.5.3. Stable Stopping-Based Functional Safety Enhancement
3.6. EXPERIMENTS FOR FUNCTIONAL SAFETY ENHANCEMENT TECHNIQUE SSFSE
3.6.1. Real-Life Parallel Application
3.6.2. Synthetic Parallel Application
3.7. CONCLUDING REMARKS
CHAPTER 4: Functional Safety Validation
4.1. INTRODUCTION
4.2. RELATED WORK
4.3. MODELS
4.3.1. System Architecture
4.3.2. Reliability Model
4.3.3. Problem Statement
4.4. NON-FAULT TOLERANT FUNCTIONAL SAFETY VALIDATION
4.4.1. Non-Fault Tolerant Reliability Requirement Assessment
4.4.2. Existing Non-Fault Tolerant Functional Safety Validation Algorithms
4.4.3. Example of the MRTRR Algorithm
4.4.4. Use of Geometric Mean under Non-Fault Tolerance
4.4.5. GMNRA Algorithm
4.4.6. Example of the GMNRA Algorithm
4.5. FAULT TOLERANT RELIABILITY REQUIREMENT VALIDATION
4.5.1. Fault Tolerant Reliability Requirement Assessment
4.5.2. Existing Fault Tolerant Functional Safety Validation Algorithms
4.5.3. Use of Geometric Mean under Fault Tolerance
4.5.4. Optimizing Response Time
4.5.5. GMFRA Algorithm
4.5.6. Example of the GMFRA Algorithm
4.6. EXPERIMENTS FOR FUNCTIONAL SAFETY VALIDATION ALGORITHMS GMNRA AND GMFRA
4.6.1. Real-Life Parallel Application
4.6.2. Synthetic Parallel Application
4.7. CONCLUDING REMARKS
SECTION II: SAFETY-AWARE COST OPTIMIZATION
CHAPTER 5: Hardware Cost Optimization
5.1. INTRODUCTION
5.1.1. Progressive Hardware Cost Optimization
5.1.2. Cost-Effectiveness-Driven Hardware Cost Optimization
5.2. RELATED WORK
5.3. MODELS AND PROBLEM STATEMENT
5.3.1. Hardware Cost Model
5.3.2. Problem Statement
5.4. PROGRESSIVE HARDWARE COST OPTIMIZATION
5.4.1. IHCO Algorithm
5.4.2. PHCO Algorithm
5.4.3. Example of the PHCO Algorithm
5.5. ENHANCED PROGRESSIVE HARDWARE COST OPTIMIZATION
5.5.1. EPHCO Algorithm
5.5.2. RE Algorithm
5.5.3. Real-Time Requirement of Tasks
5.5.4. Reliability Enhancement of Tasks
5.5.5. Example of the EPHCO Algorithm
5.5.6. SEPHCO Algorithm
5.5.7. Optimal Solutions of the Motivational Parallel Application
5.6. HARDWARE COST OPTIMIZATION BY CLOSED-TO-OPENED
5.6.1. CEHCO1 Algorithm
5.6.2. Iteration Process of CEHCO1
5.7. HARDWARE COST OPTIMIZATION BY OPENED-TO-CLOSED
5.7.1. CEHCO2 Algorithm
5.7.2. Iteration Process of CEHCO2
5.7.3. CEHCO Algorithm
5.8. EXPERIMENTS FOR HARDWARE COST OPTIMIZATION ALGORITHMS
5.8.1. Experimental Conditions and Instructions
5.8.2. Experimental Details and Analyses
5.9. CONCLUDING REMARKS
CHAPTER 6: Development Cost Optimization
6.1. INTRODUCTION
6.1.1. Development Cost Optimization with Reliability Requirement
6.1.2. Safety Assurance and Development Cost Optimization
6.2. RELATED WORK
6.3. ASIL DECOMPOSITION
6.3.1. Exposure and Reliability Requirement
6.4. MODEL AND PROBLEM STATEMENT
6.4.1. Systems Model
6.4.2. Motivational Example
6.4.3. Development Cost Model
6.4.4. Reliability Model
6.4.5. Problem Statement
6.5. RELIABILITY CALCULATION OF SCHEMES
6.5.1. Reliability Calculation
6.5.2. RCS Algorithm
6.6. MINIMIZING DEVELOPMENT COST WITH RELIABILITY REQUIREMENT
6.6.1. Task Prioritization
6.6.2. Satisfying Reliability Requirement
6.6.3. Minimizing Development Cost
6.6.4. Example of MDCRR Algorithm
6.7. FUNCTIONAL SAFETY RISK ASSESSMENT
6.7.1. Reliability Risk Assessment
6.7.2. Real-Time Risk Assessment
6.7.3. FRA Algorithm
6.7.4. Example of FRA Algorithm
6.8. DEVELOPMENT COST OPTIMIZATION WITH FUNCTIONAL SAFETY REQUIREMENTS
6.8.1. Reliability Requirement Assurance
6.8.2. Real-Time Requirement Assurance
6.8.3. Optimizing Development Cost
6.8.4. Example of DRA Algorithm
6.9. EXPERIMENTS FOR DEVELOPMENT COST OPTIMIZATION ALGORITHM MDCRR
6.9.1. Experimental Metrics
6.9.2. Real-Life Parallel Application
6.9.3. Synthetic Parallel Application
6.10. EXPERIMENTAL FOR DEVELOPMENT COST OPTIMIZATION ALGORITHMS FRA AND DRA
6.10.1. Real-Life Parallel Application
6.10.2. Synthetic Parallel Application
6.11. CONCLUDING REMARKS
CHAPTER 7: Summary and Future Research
7.1. SUMMARY
7.2. FUTURE RESEARCH
Bibliography