دانلود کتاب Vlsi-Soc: From Systems To Silicon: Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia

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Front Matter....Pages i-x
Molecular Electronics – Devices and Circuits Technology....Pages 1-10
Improving DPA Resistance of Quasi Delay Insensitive Circuits Using Randomly Time-shifted Acknowledgment Signals....Pages 11-24
A Comparison of Layout Implementations of Pipelined and Non-Pipelined Signed Radix-4 Array Multiplier and Modified Booth Multiplier Architectures....Pages 25-39
Defragmentation Algorithms for Partially Reconfigurable Hardware....Pages 41-53
Technology Mapping for Area Optimized Quasi Delay Insensitive Circuits....Pages 55-69
3D-SoftChip: A Novel 3D Vertically Integrated Adaptive Computing System....Pages 71-86
Caronte: A methodology for the Implementation of Partially dynamically Self-Reconfiguring Systems on FPGA Platforms....Pages 87-109
A Methodology for Reliability Enhancement of Nanometer-Scale Digital Systems Based on a-priori Functional Fault- Tolerance Analysis....Pages 111-125
Issues in Model Reduction of Power Grids....Pages 127-144
A Traffic Injection Methodology with Support for System-Level Synchronization....Pages 145-161
Pareto Points in SRAM Design Using the Sleepy Stack Approach....Pages 163-177
Modeling the Traffic Effect for the Application Cores Mapping Problem onto NoCs....Pages 179-194
Modular Asynchronous Network-on-Chip: Application to GALS Systems Rapid Prototyping....Pages 195-207
A Novel MicroPhotonic Structure for Optical Header Recognition....Pages 209-219
Combined Test Data Selection and Scheduling for Test Quality Optimization under ATE Memory Depth Constraint....Pages 221-244
On-chip Pseudorandom Testing for Linear and Nonlinear MEMS....Pages 245-266
Scan Cell Reordering for Peak Power Reduction during Scan Test Cycles....Pages 267-281
On The Design of A Dynamically Reconfigurable Function-Unit for Error Detection and Correction....Pages 283-297
Exact BDD Minimization for Path-Related Objective Functions....Pages 299-315
Current Mask Generation: an Analog Circuit to Thwart DPA Attacks....Pages 317-330
A Transistor Placement Technique Using Genetic Algorithm and Analytical Programming....Pages 331-344